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Combinational Logic Generator
Define input / output signals, fill in a truth table, and get minimized Boolean expressions plus a gate-level schematic. Restrict the gate library to explore different implementation styles.
1Signals
Names must be unique, start with a letter or underscore, and contain only letters, digits and underscores. First input is the most significant bit. Up to 8 inputs and 8 outputs.
Input signals
Output signals
2Gate library
The generator will only use the selected gate types. At least one functionally complete set is required (e.g. NAND alone, NOR alone, MUX2 alone, AND+OR+INV, AND+XOR, …).
3Truth table
Rows are generated automatically from all-0s to all-1s. Enter each output
value as 0 or 1 — an empty cell defaults to 0.